By Doug Jorgesen, Posted Wed Jul 09 2025 23:18:00 GMT+0000 (Coordinated Universal Time)
One of the most common tasks in high-performance Aerospace & Defense and Test & Measurement systems is broadband, high-fidelity signal detection. This is typically accomplished using a receiver that captures a wide swath of input bandwidth and conditions the signal for digitization by an analog-to-digital converter (ADC). A frequently used band for this application is 2–18 GHz—famously used in fire control radar systems (think Top Gun).
To ensure clean detection of incoming signals, the receiver must perform two key functions. First, it must condition the signal amplitude so it matches the full-scale range of the ADC—this means amplifying weak signals and attenuating strong ones. Second, it must filter the signal to reject high-power interference outside the band of interest. This is done through channel selection filtering, which separates desired low-power signals from unwanted high-power ones.
A common way to implement channel selection filtering is with a switched filter bank. This consists of a series of bandpass filters—either with fixed bandwidth or a constant percentage bandwidth—each tuned to a different center frequency, collectively covering the full operating band. However, only one filter path is active at a time. While this allows targeted filtering, it also means the receiver is blind to all other frequencies during that state. As a result, microwave switch speed becomes critical; slow switching introduces spectral blind spots where signals can be missed.
A channelized receiver eliminates these blind spots by replacing the switched filter bank with a multiplexer. Instead of selecting one frequency band at a time, the multiplexer splits the incoming signal into multiple parallel bands simultaneously. Each band is routed to its own ADC, which continuously monitors that portion of the spectrum. This parallel architecture ensures full band visibility at all times, without the latency and coverage gaps introduced by switching.
In this demonstration, we present a sample block diagram of a 2–18 GHz receiver built entirely with Marki’s ultra-small surface-mount components. These parts combine best-in-class performance with industry-leading compactness, leveraging proprietary Marki packaging and MMIC technology. Key innovations include:
CSP Packaging – Our chip-scale packaging (CSP) for limiters, power dividers, equalizers, and filters enables size reductions of up to 75% compared to traditional QFN packages.
AMM Amplifiers – The latest generation of AMM amplifiers in compact 3 mm QFN packages use a sophisticated circuit topology that reduces both size and power consumption—while delivering superior performance to conventional distributed amplifiers.
Miniature MMIC Filters – Marki’s MMIC filter technology achieves dramatic size reductions over competing solutions like thin film, laminate, or cavity filters, without compromising performance.
We’ll begin with a generalized block diagram that outlines a typical 2–18 GHz channelized receiver architecture, along with suggested product categories. Then, we’ll show the specific implementation used in the demonstration system we exhibited at the 2025 International Microwave Symposium (IMS) in June. This example highlights how compact, high-performance components from Marki can be used to realize a fully integrated, channelized microwave receiver.

To protect the front-end amplifier from high-power signals, a limiter is often the first stage in the receiver chain. This is especially important in applications near high-power emitters like radars—common in combat environments—where input powers can exceed +20 dBm. Without a limiter, these high input levels could damage the low-noise amplifier (LNA) and degrade overall receiver performance.
Because a limiter sits before the amplifier, its insertion loss directly impacts the system noise figure and thus sensitivity. Choosing a high-performance limiter is critical for preserving dynamic range and protecting downstream components.
Marki limiters are specifically designed for performance-critical applications:
Ultra-fast Recovery and No Spike Leakage
Our Schottky diode limiter technology offers virtually zero spike leakage and near-instantaneous recovery, ensuring protection without introducing additional spectral or temporal blind spots.
Chip-Scale Packaging (CSP)
These limiters feature extremely compact chip-scale packages, enabling up to 75% size reduction compared to QFN alternatives—ideal for dense receiver architectures. Despite their size, they maintain exceptionally low insertion loss and robust power handling.
Choose the appropriate limiter by selecting the limiter with the required flat leakage and power handling for your application, and then select the model with the lowest insertion loss in your band or the smallest size if your design is size restrained.
One design choice in a high-performance receiver front end is whether to use a fixed amplifier or to incorporate a switchable amplifier bypass path. This decision balances sensitivity and linearity based on the signal environment.
In this block diagram, we show a configurable architecture using two microwave switches to toggle between the front-end amplifier and a bypass path:
Low Signal Conditions:
The amplifier is switched in to provide maximum sensitivity, improving weak signal reception.
High Signal Conditions:
The amplifier is switched out, routing the signal through a bypass path. This approach maximizes linearity and avoids distortion from high power input levels.
SOI-Based Technology:
Marki switches offer low insertion loss and high isolation, reducing added noise and minimizing feedback oscillation risks in the amplifier loop.
Compact Packaging:
Available in 2×2 mm LGA packages, these switches are ideal for dense layouts and compact receiver modules.
Choose the appropriate switch by the required power handling, then the minimum insertion loss in the target band. The isolation needs to be just high enough to prevent oscillations in the amp when the amp is switched out.
The first-stage amplifier plays a critical role in determining overall receiver performance. Its gain and noise figure, in combination with the preceding losses (e.g., limiter or switch), dominate the system noise figure and ultimately define the receiver’s sensitivity.
Different environments require different amplifier tradeoffs:
Low Signal Power Environments:
Use a low-noise amplifier (LNA) with minimal power consumption. Linearity is less critical here.
High Signal Power or Congested Environments:
Prioritize high linearity to avoid distortion and intermodulation, even if it comes at the cost of higher power consumption or slightly elevated noise figure.
Industry-Leading Noise Figures across broad bandwidths using advanced MMIC designs.
Ultra-Low Power Options for noise-sensitive systems.
Small Surface Mount Packages with minimal external components for easy integration.
The amplifier choice is complex, and depends on factors including noise figure, linearity (IP3, P1dB, IP2, harmonic generation), power consumption and efficiency, size, application circuit, and input survivability. If you have questions on this topic it is best to reach out to a Marki engineer through the support request .
· AMM-9619PSM – Lowest noise figure
· AMM-9853PSM – Low Power
· AMM-7473PSM – Highest Linearity and Dynamic Range
A power divider is used to split the incoming signal into two identical paths, enabling multiple multiplexers to cover overlapping frequency bands. This overlap is crucial in channelized systems to ensure seamless coverage—particularly when a signal straddles the edge between two bands.
Insertion Loss – Lower loss preserves signal strength ahead of filtering and digitization.
Isolation – High isolation between output ports prevents unwanted crosstalk.
Size – Small form factor is critical for compact system integration.
Marki’s surface-mount Wilkinson power dividers combine low loss, high isolation, and ultra-compact size thanks to a proprietary design and chip-scale packaging (CSP).
The multiplexer is the core of the channelized receiver architecture. It performs the actual frequency-domain separation, routing different parts of the input spectrum into distinct channels—each monitored by a dedicated ADC.
A multiplexer is built from a combination of lowpass, highpass, and bandpass filters merged at a common node and matched across the entire operating band. Each output corresponds to a specific sub-band of the total input range.
MMIC-Based Miniaturization – Advanced MMIC filter technology enables form factors significantly smaller than cavity, laminate, or thin-film alternatives.
Flexible Design Options – Available as diplexers, triplexers, or quadplexers with fully customizable frequency plans to match system needs.
Custom multiplexers can also be developed with reasonable costs and lead times.
Equalizers are used to correct frequency-dependent insertion loss in a receiver system. Most transmission lines and passive components introduce a negative insertion loss slope, meaning they attenuate higher frequencies more than lower ones. Equalizers apply the opposite slope, resulting in flat gain across the band.
When placed after the front-end LNA, equalizers do not degrade the noise figure or linearity of the receiver, making them a low-risk, high-reward addition for improving system uniformity.
Broadband Matching – Engineered for exceptional return loss across wide frequency ranges.
CSP Packaging – Ultra-compact footprint using patented chip-scale technology.
Gain block amplifiers are placed between the front-end amplifier and the variable gain stage ahead of the ADC. Their role is to compensate for losses introduced by interstage routing and passive components.
Noise figure and linearity are less critical here than in the LNA stage.
Moderate gain is often preferred to prevent saturation of downstream variable gain amplifiers or ADCs.
Size, power consumption, and application simplicity are top priorities.
Even after multiplexer-based channelization, additional filtering is often needed to suppress unwanted signals. These cleanup filters help:
Prevent distortion in the ADC caused by strong out-of-band signals
Avoid aliasing in systems with undersampling or relaxed filtering upstream
High Rejection – Excellent stopband performance for tight spectral environments
Low Insertion Loss – Maintains gain flatness in the passband
CSP Footprint – Ideal for compact receiver layouts
|
Band (GHz) |
Recommended Filters |
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2–4 |
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4–6 |
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6–8 |
MFBP-00110CSP3 (approximate) |
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8–10 |
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10–12 |
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12–14 |
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14–16 |
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16–18 |
Real-World Implementation: IMS 2025 Demo Block Diagram
To illustrate how the generalized receiver architecture can be put into practice, the diagram below shows the exact implementation featured in our demo at the 2025 International Microwave Symposium (IMS). This system uses a complete Marki front-end solution, optimized for wideband performance and minimal size.
Demo Highlights:
Components Used:
|
Component |
Description |
|
HLM-8010CSP1 |
DC–40 GHz Limiter, 0.5 dB IL, +11 dBm flat leakage, 1.5 mm CSP |
|
AMM-9859PSM |
DC–20 GHz LNA, 15.5 dB gain, 1.9 dB NF, 3 mm QFN |
|
MEQ6-26CSP1 |
DC–26 GHz gain slope equalizer, 6 dB DC attenuation, 1.5 mm CSP |
|
MPD-0222FCSP2 |
2–22 GHz Wilkinson power divider, 0.6 dB excess IL, 2.5 mm CSP |
|
MMPX-00001PSM, 00002PSM |
DC–16/18 GHz Multiplexers, 2 GHz channel spacing with overlapping bands, 6 mm QFN |
Conclusion: Building Your Own Channelized Receiver
This block diagram outlines a generalized architecture for a 2–18 GHz channelized receiver using Marki’s high-performance surface-mount components. While we originally showcased a specific implementation at the 2025 International Microwave Symposium (IMS), this guide is designed as a flexible foundation for your own receiver designs. Whether you’re optimizing for size, power, linearity, or noise performance, the modular building blocks shown here can be tailored to fit a wide range of system requirements.
For help translating this architecture into a working system, contact our applications engineering team.
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