Rules of Thumb for Designing a Landing Pattern

Download as PDF: App Note Designing Landing Pattern

Rules of Thumb for Designing a Landing Pattern

By Jessica Kaur, Applications Engineer at Marki Microwave

At microwave and mmWave frequencies, the geometry of the pads, tapers, and surrounding copper on a PCB significantly affects signal integrity. Mismatches in pad size, shape, or spacing can introduce parasitic capacitance and inductance, leading to return loss degradations, impedance discontinuities, and signal reflections. For this reason, Marki Microwave provides a recommended PCB footprint for every surface mount part in our catalog. Our evaluation boards use the same footprint to characterize the device. When the recommended footprint is used on the same board stackup, the part will perform as shown on the datasheet. This tech note explains how to maintain consistent electrical performance when adapting our recommended landing patterns to different board stackups.

Rules of Thumb

Below 6 GHz: Launch optimization is generally not a concern. Using the provided landing pattern without modification is typically sufficient in these scenarios. High return loss components may require additional tuning.

6 to 12 GHz: The recommended footprint geometry can typically be used as-is if the board materials are similar to the Marki reference design. For example, 0.005 to 0.010″ thick boards with εr ≈ 3 to 5, relative to a 0.008″ Rogers 4003 reference, can be used without change. If a different board material results in a different trace width, a taper must be used to transition from the trace to the signal pad. Thicker boards necessitate a short, simple taper, and thinner boards require a long, more inductive taper. Off-chip distributed matching circuits must be recreated to provide the same impedance at the device pads.

12 GHz and above: Footprint and launch optimization are critical for all component types when using a different stackup than the Marki Microwave recommendation. Simulation is strongly recommended to verify the exact taper length and geometry needed to create a proper launch and compensate for parasitic effects. Further details on simulation-based taper design will be covered in a future tech note.

 

What Marki Datasheets Provide

For any surface mount component in our portfolio, the datasheet typically includes two key references:

1. Outline drawing: An overview of the package including pin function, material information, pin dimensions, and pin spacing
2. Footprint drawing: The recommended landing pattern for PCB placement, board stackup, and tapering dimensions. Identical layout to our evaluation boards.

Together, these provide the technical details needed to replicate datasheet performance. The remainder of this note addresses what to do when your stackup differs from the one Marki specifies.

When to Modify the Footprint

In general, Marki parts are designed such that the pads are well matched to 50 Ω across a broad bandwidth. If the traces on the board are not 50 Ω, there are impedance mismatches at the device pads causing reflections and degradation in performance. If you are using the same board material as specified in the Marki datasheet, no modification is necessary — our designers have already optimized the landing pattern, including the taper dimensions, for that stackup. Modification becomes necessary when your system uses a different board material, i.e., has a different dielectric constant (εr) or substrate thickness than the Marki reference design.

Taper Definition and Importance

When a stackup results in a 50 Ω trace width that is narrower or wider than the component signal pad, a direct connection creates an abrupt impedance step that produces reflections. A taper (Figure 1) provides a gradual geometric transition between the signal pad and the PCB trace, functioning as a distributed matching network. By smoothly changing the trace width over a short distance, the taper reduces reflections and improves return loss.

From a circuit perspective, the taper introduces a controlled combination of distributed inductance and capacitance that compensates for abrupt impedance steps at the QFN package pads. This allows the designer to tune the impedance looking into the device so that it matches the 50 Ω PCB trace.

Fig. 1: Example of tapering.

Key Taper Guidelines:

• Higher εr or thinner substrates have narrower 50 Ω traces and increased parasitic at the pad. To tune out this capacitance, experts typically implement a longer, more inductive taper.
• Lower εr or thicker substrates yield wider 50 Ω traces and reduced pad capacitance. The minimal parasitic capacitance requires little inductive compensation, effectively reducing the launch to a short, simple taper.

Do not make the taper longer than necessary. The taper must be long enough for the lowest frequency of operation; additional length adds unnecessary insertion loss.  Insertion loss can be optimized in any 3D EM design tool such as HFSS.

Taper Examples:

Below are two examples of Marki Microwave landing patterns. One is a simple taper, similar to the previous discussion, and the second is a more complex landing pattern with a distributed matching circuit.

For the simple case, a DC to 14 GHz driver amplifier, the AKA-1400PSM, is used. The footprint uses a short, smooth, continuous taper (Figure 2) that transitions from the pad width to the 50 Ω trace. This landing pattern is designed for 8 mil thick Rogers 4003, where 50 Ω traces are thicker than the pad’s dimensions. This type of taper helps to minimize reflections by reducing abrupt impedance discontinuities and is generally sufficient for components with moderate return loss.

Fig. 2: AKA-1400PSM driver footprint drawing.

The second example uses a 30.60 to 41.00 GHz bandpass filter, MFBC-00016PSM, whose landing pattern recommends an a 0.008” thick Rogers 4003 stackup. Unlike the previous example, this footprint requires an off-chip distributed matching circuit (Figure 3) and cannot be simply tapered, as that inductance is required. If a different board material is chosen, users must calculate the equivalent impedance of the neck with the new stackup and then taper the output 50 Ω trace to the device pads accordingly. This is essential for high frequency products like this filter, where return loss is a major figure of merit. For precise tapering impedance on a different stackup, Marki recommends optimization using 3D EM design tools.

Fig. 3: MFBC-00016PSM bandpass filter footprint drawing.

The Role of Ground Vias

Marki's recommended footprints include plated through-hole vias, particularly near the signal transitions, as exemplified in Figure 4. While the trace geometry and the dielectric stackup set the trace impedance, the ground vias ensure a low-impedance ground return path. All ground planes in the stackup must be held at the same potential. Without sufficient vias, an inductive path develops between ground planes, effectively increasing the inductance to ground. Similarly, if vias are placed too far from signal traces, the longer return path adds parasitic ground inductance.

This is particularly important at the component launch. The device is characterized based on the impedance it sees at its terminals, and any additional ground inductance at the launch changes that impedance, degrading the match. High return loss components are especially sensitive to this effect since varying the impedance at the launch will directly impact return loss.

As a practical matter, more vias are better. Insufficient ground vias can create measurable problems, so Marki recommends including as many as the layout allows. However, final implementation is left up to the designer’s discretion. At lower frequencies (below 6 GHz), via placement is less critical, though solid grounding is still required. At higher frequencies (above 6 GHz), the via placement shown in Marki's recommended footprint must be followed as closely as possible.

Fig. 4: Example of vias near the transition on EVB-MFBC-00016P.

 

Glass Filter Landing Pattern Considerations

Marki's recently released high-rejection, small-form-factor glass filters leverage advanced glass substrate technology to achieve smaller filter constructions that replace larger circuit board–based designs. For more information on glass filters and how they achieve such sharp rejection and high power handling, please refer to The Future of Filters is Clear: Unlocking the Advantage of Glass Filter Technology.

The datasheet provides two key references, shown in Figures 5 and 6.  Figure 5 shows the outline drawing, which defines the dimensions of the signal pads and uses a hatched section to indicate ground plane placement and solder mask coverage. The drawing also identifies a keep-out zone directly beneath the part where no solder or conductive material can be present.

Fig. 5: MFBP-00162GSM1 outline drawing.

The corresponding footprint drawing in Figure 6 provides the recommended number of plated through-hole vias as well as the board stackup. Within the keep-out zone, all metal must be removed from the top metal layer where the filter will be placed. To prevent detuning and ensure datasheet performance, a minimum of 3 mil of non-conductive material is required between the backside of the filter and the nearest ground layer. Solder mask applied directly over metal is not recommended in the keep-out area. For multi-layer PCBs, provided the 3 mil spacing requirement beneath the keep-out zone is maintained, no performance degradation is expected.

Fig. 6: MFBP-00162GSM1 Footprint Drawing

Conclusion

This tech note has provided guidelines for taper design and ground via placement, as well as a general overview of what Marki includes in our datasheet footprint drawings. For best results, we recommend using the specific stackup outlined on the datasheet, as Marki guarantees performance with our provided landing pattern. For any custom inquiries about Marki modifying an existing landing pattern for your application and stackup, please contact Marki Microwave support at [email protected].