Designing a Compact, Filtered mm-Wave Multiplier with IADA-2050CH

Introduction: The Challenge of mm-Wave LO Generation

Generating high-quality mm-wave local oscillator (LO) signals with strong output power, low noise, and excellent spectral purity—without relying on expensive synthesizers—remains a key challenge in radar, communications, and test systems. An ideal mm-wave LO must deliver high output power with low phase noise, low thermal noise, and minimal harmonic and subharmonic content.

Legacy Solutions: ADA-2052 and AQA-2156

Marki has long addressed this challenge with connectorized multiplier modules that combine frequency multiplication with integrated amplification. Our ADA-2052 and AQA-2156 products represent the second generation of this approach and have been in reliable production for over five years, helping customers generate mm-wave LO tones without high-end synthesizers.

IMS 2025 Demo: An Integrated Upgrade

At IMS 2025, we demonstrated an updated connectorized multiplier module that introduces three significant improvements over previous designs:

IADA-2050CH: Integrated Multiplier MMIC

Instead of using discrete amplifier and multiplier components, the new design is built around the IADA-2050CH—a single-chip solution that integrates a preamplifier, doubler, and output amplifier. This MMIC delivers 17–20 dBm of output power from 20 to 50 GHz, with roughly 20 dB suppression of the first and third harmonics. Achieving this level of performance in an integrated MMIC is notable, especially given that the process used does not feature ideal diode characteristics for doubling. This chip is also available in a surface mount package as the IADA-2050PSM.

Switched Filter Bank with PIN Switches

To support channel-specific filtering, the module incorporates a two-channel switched filter bank using our new high-frequency PIN diode switches. The MSW2-0002CH provides low insertion loss and high isolation from 4 to 50 GHz. Two switches are configured to select between filter paths.

Custom MMIC Filters and Matching

The switched filter bank feeds into a pair of MMIC bandpass filters: one for 18–26 GHz and another for 26–40 GHz. These filters are co-fabricated on a single die to minimize size and impedance mismatches with the switch die. Initial tests using catalog filters revealed issues with insertion loss ripple and poor return loss in the upper band. These were resolved by redesigning the filters to better match the switch characteristics.

This demonstration highlights Marki's ability to co-design and integrate amplifiers, multipliers, filters, and switches across various MMIC processes. It also underscores our strength in packaging solutions from bare die to connectorized modules and multi-chip systems. The following sections dive deeper into the architecture and compare the new solution to the existing ADA-2052 module.

Block Diagram and Signal Path

Pre-Amplifier

Both the legacy ADA-2052 and the IADA-2050CH begin with a broadband preamplifier. This amplifier raises the input level from 0–5 dBm to 13–18 dBm to properly drive the passive doubler. Covering 10–25 GHz, this amplifier must offer flat gain, operate in Class A mode, and minimize harmonic generation.

Doubler Comparison

The ADA-2052 uses the discrete MMD-2060HCH, a balanced, multi-octave passive doubler built on a process optimized for mixers and doublers. Harmonic suppression comes from circuit balance, enabling wideband operation. The IADA-2050CH follows a similar topology, but on a different process. Despite higher inherent loss in the doubler section, overall performance is preserved due to reduced losses between stages.

Output Amplifier

The output stage in both designs must deliver over 18 dBm across a multi-octave band up to 50 GHz—a challenging task. The ADA-2052 uses the AMM-6702CH, while the IADA-2050CH integrates a similar output amplifier structure.

Harmonic Suppression: The Core Challenge

While both multipliers suppress the first and third harmonics via circuit balance, their amplifiers still regenerate these unwanted tones. Even harmonics like the fourth and fifth are not actively cancelled, relying only on roll-off. Real-world performance shows harmonic suppression in the range of 20–40 dBc for the ADA-2052, and 20–30 dBc for the IADA-2050CH.

High-performance applications, especially in clocking and LO generation, often require 60–80 dBc suppression. Meeting this standard necessitates additional harmonic filtering.

Filter Design Tradeoffs

The Multi-Octave Filtering Dilemma

Effective harmonic filtering is difficult due to the wideband nature of the multiplier. For instance, a 10 GHz input produces harmonics at 20, 30, 40, and 50 GHz. To cleanly extract the desired 2nd harmonic at 20 GHz, a bandpass filter must sharply reject 30 GHz (3rd harmonic) while passing 20 GHz. But if the output shifts to 26+ GHz, that same filter becomes ineffective.

IMS Demo Filter Implementation

In the IMS demo, Marki implemented two bandpass filters: 18–26 GHz and 26–40 GHz. This strategy provides reasonable harmonic rejection while enabling second-harmonic transmission across 20–40 GHz. However, limitations appear near the filter transition zone (24–28 GHz), where insertion loss increases and rejection of the 3rd harmonic (38–40 GHz) and fundamental (20 GHz) decreases.

Ideal Filter Architecture

The ideal architecture uses overlapping ~33% bandwidth bandpass filters, such as:

• 18–24 GHz

• 24–32 GHz

• 32–40 GHz

This configuration allows better control over harmonic rejection, especially at band edges. Additional filtering would help fully suppress the fundamental and 3rd harmonics across the entire output range.

Conclusion: Towards Cleaner mm-Wave Signals

Marki's IMS 2025 demo showcased a fully integrated MMIC multiplier module that simplifies LO generation while pushing the boundaries of size and performance. By combining amplifiers, doublers, switches, and filters into a cohesive design, we have shown a clear path to cleaner, more compact mm-wave LO systems.

This work highlights our ability to co-design active and passive components across MMIC processes, while also packaging them efficiently in connectorized modules and multi-chip systems. The result: synthesizer-level performance, without synthesizer-level complexity or cost.