Rev: C | Copyright © 2017 - 2018 Marki Microwave LLC.

General Description

NLTL-6275 is a MMIC non-linear transmission line (NLTL) based comb generator. This NLTL offers excellent phase noise performance over a 3 to 15 GHz input frequency range with output tones beyond 85 GHz. NLTL-6275 is fabricated with GaAs Schottky diode based varactors on a 2.28 mm x 3.13 mm substrate. Both wire bondable die and connectorized modules are available

Features

  • Low Phase Noise
  • Broadband Input Frequencies
  • No External DC Bias Required

Functional Block Diagram

Block Diagram
Photo of NLTL-6275CH

Electrical Performance Summary

ParameterTypUnit
Input Power 17 to 26dBm
Output Frequency Range 3 to 85GHz
Input Frequency Range 3 to 15GHz

Summary only – refer to the Electrical Specifications, Absolute Maximum Ratings, and Recommended Operating Range tables for complete details.

Part Ordering Options

Part NumberDescriptionPackageConnectorsGreen StatusProduct LifecycleExport Classification
NLTL-6275U-SWGaAs MMIC Non-Linear Transmission LineUStandard

RoHS

REACH

ReleasedEAR99
NLTL-6275UGaAs MMIC Non-Linear Transmission LineUStandard

RoHS

REACH

ReleasedEAR99
NLTL-6275CHGaAs MMIC Non-Linear Transmission LineCH-

RoHS

REACH

ReleasedEAR99

Table Of Contents

Typical Performance Plots

Output Power vs Input Power: 3 GHz Sine Wave Input (dBm) graph for NLTL-6275CH
3 GHz +19 dBm Sine Wave Input graph for NLTL-6275CH
NTL Output for 3 GHz +19 dBm Sine Wave Input graph for NLTL-6275CH
Output Power vs Input Power: 5 GHz Sine Wave Input (dBm) graph for NLTL-6275CH
5 GHz +19 dBm Sine Wave Input graph for NLTL-6275CH
NLTL Output for 5 GHz +19 dBm Sine Wave Input graph for NLTL-6275CH
Output Power vs Input Power: 7 GHz Sine Wave Input (dBm) graph for NLTL-6275CH
7 GHz +19 dBm Sine Wave Input graph for NLTL-6275CH
NLTL Output for 7 GHz +19 dBm Sine Wave Input graph for NLTL-6275CH
Output Power vs Input Power: 10 GHz Sine Wave Input (dBm) graph for NLTL-6275CH
10 GHz +19 dBm Sine Wave Input graph for NLTL-6275CH
NLTL Output for 10 GHz +19 dBm Sine Wave Input graph for NLTL-6275CH
Output Power vs Input Power: 15 GHz Sine Wave Input (dBm) graph for NLTL-6275CH
15 GHz +19 dBm Sine Wave Input graph for NLTL-6275CH
NLTL Output for 15 GHz +19 dBm Sine Wave Input graph for NLTL-6275CH

Typical Performance Plots

Output Power vs Input Power: 3 GHz Sine Wave Input (dBm) graph for NLTL-6275CH
3 GHz +19 dBm Sine Wave Input graph for NLTL-6275CH
NTL Output for 3 GHz +19 dBm Sine Wave Input graph for NLTL-6275CH
Output Power vs Input Power: 5 GHz Sine Wave Input (dBm) graph for NLTL-6275CH
5 GHz +19 dBm Sine Wave Input graph for NLTL-6275CH
NLTL Output for 5 GHz +19 dBm Sine Wave Input graph for NLTL-6275CH
Output Power vs Input Power: 7 GHz Sine Wave Input (dBm) graph for NLTL-6275CH
7 GHz +19 dBm Sine Wave Input graph for NLTL-6275CH
NLTL Output for 7 GHz +19 dBm Sine Wave Input graph for NLTL-6275CH
Output Power vs Input Power: 10 GHz Sine Wave Input (dBm) graph for NLTL-6275CH
10 GHz +19 dBm Sine Wave Input graph for NLTL-6275CH
NLTL Output for 10 GHz +19 dBm Sine Wave Input graph for NLTL-6275CH
Output Power vs Input Power: 15 GHz Sine Wave Input (dBm) graph for NLTL-6275CH
15 GHz +19 dBm Sine Wave Input graph for NLTL-6275CH
NLTL Output for 15 GHz +19 dBm Sine Wave Input graph for NLTL-6275CH

Typical Performance Plots

Output Power vs Input Power: 3 GHz Sine Wave Input (dBm) graph for NLTL-6275CH
3 GHz +19 dBm Sine Wave Input graph for NLTL-6275CH
NTL Output for 3 GHz +19 dBm Sine Wave Input graph for NLTL-6275CH
Output Power vs Input Power: 5 GHz Sine Wave Input (dBm) graph for NLTL-6275CH
5 GHz +19 dBm Sine Wave Input graph for NLTL-6275CH
NLTL Output for 5 GHz +19 dBm Sine Wave Input graph for NLTL-6275CH
Output Power vs Input Power: 7 GHz Sine Wave Input (dBm) graph for NLTL-6275CH
7 GHz +19 dBm Sine Wave Input graph for NLTL-6275CH
NLTL Output for 7 GHz +19 dBm Sine Wave Input graph for NLTL-6275CH
Output Power vs Input Power: 10 GHz Sine Wave Input (dBm) graph for NLTL-6275CH
10 GHz +19 dBm Sine Wave Input graph for NLTL-6275CH
NLTL Output for 10 GHz +19 dBm Sine Wave Input graph for NLTL-6275CH
Output Power vs Input Power: 15 GHz Sine Wave Input (dBm) graph for NLTL-6275CH
15 GHz +19 dBm Sine Wave Input graph for NLTL-6275CH
NLTL Output for 15 GHz +19 dBm Sine Wave Input graph for NLTL-6275CH

Specifications

Electrical Specifications

The electrical specifications apply at TA=+25°C in a 50Ω system. Typical data shown is for the NLTL used in the forward direction with a sine wave input.

ParameterTest ConditionsMinimum
Frequency
(GHz)
Maximum
Frequency
(GHz)
MinTypMaxUnit
Input Frequency Range -- -3-15GHz
Input Power -- -17-26dBm
Maximum Output Harmonic for given Input 1Input=10 GHz
- ---8-
Maximum Output Harmonic for given Input 2Input=15 GHz
- ---5-
Maximum Output Harmonic for given Input 3Input=3 GHz
- ---28-
Maximum Output Harmonic for given Input 4Input=5 GHz
- ---16-
Maximum Output Harmonic for given Input 5Input=7 GHz
- ---12-
Output Frequency Range -- -3-85GHz

[1][2][3][4][5] Maximum Output Harmonic specification given for the harmonic with a -20 dBm output power for a +20 dBm input.

The Recommended Operating Conditions indicate the limits, inside which the device should be operated, to guarantee the performance given in Electrical Specifications Operating outside these limits may not necessarily cause damage to the device, but the performance may degrade outside the limits of the electrical specifications. For limits, above which damage may occur, see Absolute Maximum Ratings.

ParameterMinNominalMaxUnit
Ambient Temperature -5525100°C
Input Power 16-25dBm

Absolute Maximum Ratings

The Absolute Maximum Ratings indicate limits beyond which damage may occur to the device. If these limits are exceeded, the device may be inoperable or have a reduced lifetime.

ParameterMaximum RatingUnit
Maximum Operating Temperature 100°C
Maximum Storage Temperature 125°C
Minimum Operating Temperature -55°C
Minimum Storage Temperature -65°C

Package Information

ParameterDetailsRating
Dimensions-3.13 x 2.28 mm

Sequencing Requirements

This is a passive NLTL that requires no external DC bias. Self-bias of the diodes is sufficient for operation. It is not required, but is recommended to provide a 50Ω termination to each port before applying RF power.

Port Configuration and Functions

Port Diagram

A top-down view of the NLTL-6275’s CH package outline drawing is shown below.

Diagram of the port configuration for NLTL-6275CH

Port Functions

PortFunctionDescriptionDC Equivalent
Circuit
GNDGround CH package ground path is provided through the substrate and ground bond padsEquivalent circuit for the Ground
Port 1Input Port 1 is diode connected for the CH package and DC short for the U package.Equivalent circuit for the Input
Port 2Output Port 2 is diode connected for the CH and DC open for the U package.Equivalent circuit for the Output

Operation

Application Information

Nltl 6275 U App Info

NLTL-6275 belongs to Marki Microwave’s NLTL family of multipliers and non-linear transmission lines. The NLTL product line consists of passive GaAs MMIC non-linear transmission lines designed and fabricated with GaAs Schottky diode based varactors. NLTLs take an input signal and create an impulse train of harmonics. Harmonic outputs up to and beyond 85 GHz are generated by the NLTL.


Port 1 supports S, C, and X band input signals. Port 2 will output integer multiples of the input signal (i.e., x2, x3, x4, …, x28) up to the 28th output harmonic or a maximum of 85 GHz for a typical -20 dBm output power. Higher harmonics can be generated but will be at a lower efficiency.


The operating conditions of the NLTL are extremely important to optimize performance. High power inputs will increase the output power observed; however, the conversion efficiency will decrease. This is increasingly true for higher input frequencies and at input powers above the recommended limit.


NLTL-6275 requires no external DC bias. The self-bias of the diodes caused by the rectified RF input signal is sufficient for operation. For the best performance, optimization of the DC return path is recommended for each specific application to optimize the harmonic output power distribution.


The phase noise of a non-linear transmission line is outstanding. If verification of performance is necessary, the application circuit used and input conditions are extremely important. NLTLs are AM sensitive. If there is excessive AM noise on the input of the NLTL, observing the output of the NLTL will show excessive PM/phase noise because of the high AM to PM conversion property of NLTLs.

Application Circuit

Application Circuit for NLTL-6275CH

Application Circuit Description

DC Path to Ground — An RF choke followed by a 15 Ω resistor should be used to provide a DC path to ground on the input port of the NLTL. A shunt 1 μF capacitor is used to filter noise generated by the resistor. This forms the circuit which self-biases the NLTL. The DC return to ground removes DC rectified current created by high power RF signal injection. The DC path to ground is provided within the S package. A conical coil inductor is recommended to push the self-resonance frequency of the inductor past the operating bandwidth of the NLTL. The recommended inductance value of the conical coil inductor is 50nH or higher.


Blocking Capacitor — A DC blocking capacitor on the output of the NLTL-6275’s integrated circuit is necessary to prevent unwanted DC current flow from or to the output. If there is a DC signal on the input, place a DC block on the input to avoid disrupting the self-biasing of the diodes.

Die Mounting Recommendations

Mounting and Bonding Recommendations

Marki MMICs should be attached directly to a ground plane with conductive epoxy. The ground plane electrical impedance should be as low as practically possible. This will prevent resonances and permit the best possible electrical performance. Datasheet performance is only guaranteed in an environment with a low electrical impedance ground.


Mounting - To epoxy the chip, apply a minimum amount of conductive epoxy to the mounting surface so that a thin epoxy fillet is observed around the perimeter of the chip. Cure epoxy according to manufacturer instructions.


Wire Bonding - Ball or wedge bond with 0.025 mm (1 mil) diameter pure gold wire. Thermosonic wirebonding with a nominal stage temperature of 150 °C and a ball bonding force of 40 to 50 grams or wedge bonding force of 18 to 22 grams is recommended. Use the minimum level of ultrasonic energy to achieve reliable wirebonds. Wirebonds should be started on the chip and terminated on the package or substrate. All bonds should be as short as possible <0.31 mm (12 mils).


Circuit Considerations – 50 Ω transmission lines should be used for all high frequency connections in and out of the chip. Wirebonds should be kept as short as possible, with multiple wirebonds recommended for higher frequency connections to reduce parasitic inductance. In circumstances where the chip more than .001” thinner than the substrate, a heat spreading spacer tab is optional to further reduce bondwire length and parasitic inductance.

Handling Precautions

General Handling

Chips should be handled with care using tweezers or a vacuum collet. Users should take precautions to protect chips from direct human contact that can deposit contaminants, like perspiration and skin oils on any of the chip's surfaces.

Static Sensitivity

GaAs MMIC devices are sensitive to ESD and should be handled, assembled, tested, and transported only in static protected environments.

Cleaning and Storage: Do not attempt to clean the chip with a liquid cleaning system or expose the bare chips to liquid. Once the ESD sensitive bags the chips are stored in are opened, chips should be stored in a dry nitrogen atmosphere.

Bonding Diagram

Nltl 6275 U Bonding Diagram

Mechanical Data

Outline Drawing

Download : Outline 2D Drawing

Outline Drawing

Revision History

Revision CodeRevision DateComment
-2017-09-01Datasheet Initial Release
A2017-10-01Corrected typos
B2017-12-01Added U package outline
C2018-09-01Corrected Signal Pad Locations

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