| Parameter | Typ | Unit |
|---|---|---|
| Frequency Range | 0 to 50 | GHz |
| Attenuation | 4.75 | dB |
| Return Loss | 20 | dB |
Summary only – refer to the Electrical Specifications, Absolute Maximum Ratings, and Recommended Operating Range tables for complete details.
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ATN06-0050CSP1
Chip Scale Package MMIC 50 GHz 6dB Attenuator
General Description
The ATN06-0050CSP1 is a surface mount GaAs MMIC 6dB attenuator in a chip scale package (CSP1). This attenuator is an ideal solution for attenuating a signal and can be used in a wide range of applications. The CSP1 allows for extreme miniaturization of SMT footprint while providing die-like performance. GaAs MMIC technology provides consistent unit-to-unit performance in a small, low-cost form factor. Compensates for high frequency board losses with a positive gain slope. A 50-ohm match is maintained over the entire operating frequency range.
Features
- Small 1.5 x 1.5 mm package size
- 6dB attenuation from DC to 50 GHz
- 20dB typical return loss over operating band
- 1W RF Power
- This product embodies Marki Microwave's U.S. Pat. 11,869,858.
Functional Block Diagram
Electrical Performance Summary
Part Ordering Options
| Part Number | Description | Package | Green Status | Product Lifecycle | Export Classification | Recommended Replacement |
|---|---|---|---|---|---|---|
| ATN06-0050CSP1 | Chip Scale Package MMIC 50 GHz 6dB Attenuator | CSP1 | RoHS REACH | Not Recommended for New Design | EAR99 | ATN06-0070CSP1 |
| EVB-ATN06-0050 | Evaluation Board, Chip Scale Package MMIC 50 GHz 6dB Attenuator | EVB | REACH RoHS | Released | EAR99 | - |
Table Of Contents
Typical Performance Plots
Electrical Performance Data is de-embedded to the CSP package ports.
Electrical Performance Over Temperature
Evaluation board performance is shown as a proxy for device performance due to fixturing variability over temperature
Specifications
Electrical Specifications
The electrical specifications apply at TA=+25°C in a 50Ω system. Typical data shown is for the attenuator in a CSP package with a sine wave input applied to port 1.
| Parameter | Port Configuration | Test Conditions | Minimum Frequency (GHz) | Maximum Frequency (GHz) | Min | Typ | Max | Unit |
|---|---|---|---|---|---|---|---|---|
| Frequency Range | - | - | 0 | 50 | - | - | - | GHz |
| Attenuation | - | - | 30 | 50 | - | 4.75 | - | dB |
| Attenuation | - | - | 0 | 30 | - | 5.9 | - | dB |
| Impedance | - | - | 0 | 50 | - | 50 | - | Ω |
| Return Loss | - | - | 0 | 40 | 13 | 20 | - | dB |
| Return Loss | - | - | 40 | 50 | - | 14 | - | dB |
Absolute Maximum Ratings
The Absolute Maximum Ratings indicate limits beyond which damage may occur to the device. If these limits are exceeded, the device may be inoperable or have a reduced lifetime.
| Parameter | Maximum Rating | Unit |
|---|---|---|
| Maximum Operating Temperature | 100 | °C |
| Maximum Storage Temperature | 125 | °C |
| Minimum Operating Temperature | -55 | °C |
| Minimum Storage Temperature | -65 | °C |
| RF Power Handling | 1 | W |
Package Information
| Parameter | Details | Rating |
|---|---|---|
| ESD | 250 to < 500 Volts | HBM Class 1A |
| Dimensions | - | 1.5 x 1.5 mm |
| Moisture Sensitivity Level | - | MSL 3 |
Port Configuration and Functions
Port Diagram
Port Functions
Configuration A
| Port | Function | Description | DC Equivalent Circuit |
|---|---|---|---|
| Ground Paddle | Ground | CSP package ground path is provided through the ground paddle. |  |
| Pin 1 | Input/Output | Pin 1 and Pin 2 are DC connected to each other and ground through a T-network of resistors. |  |
Configuration A
| Port | Function | Description | DC Equivalent Circuit |
|---|---|---|---|
| Ground Paddle | Ground | CSP1 package ground path is provided through the ground paddle. | |
| Pin 1 | Input/Output | Pin 1 and Pin 2 are DC connected to each other and ground through a T-network of resistors. | |
| Pin 2 | Input/Output | Pin 1 and Pin 2 are DC connected to each other and ground through a T-network of resistors. | |
Mechanical Data
Outline Drawing
Download : Outline 2D Drawing Outline 3D Drawing Outline 3D STP
Footprint Image
Download : Footprint Drawing
Evaluation Board
Evaluation Board - Outline Drawing
Revision History
| Revision Code | Revision Date | Comment |
|---|---|---|
| - | 2022-08-11 | Initial Release |
| A | 2025-04-15 | NRND |
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